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Processed in 0.479364 secs) Received: from r220-1.rz.rwth-aachen.de (134.130.3.31) by mail.clarkson.edu with SMTP; 10 Dec 2001 07:39:42 -0000 Received: from r220-1.rz.RWTH-Aachen.DE (relay2.RWTH-Aachen.DE [134.130.3.1]) by r220-1.rz.RWTH-Aachen.DE (8.10.1/8.11.3-2) with ESMTP id fBA7dK722853; Mon, 10 Dec 2001 08:39:20 +0100 (MET) Received: from nets2.rz.RWTH-Aachen.DE (nets2.rz.RWTH-Aachen.DE [137.226.144.243]) by r220-1.rz.RWTH-Aachen.DE (8.10.1/8.11.3/6) with ESMTP id fBA7dBW22811; Mon, 10 Dec 2001 08:39:12 +0100 (MET) Received: from nets2.rz.RWTH-Aachen.DE (localhost [127.0.0.1]) by nets2.rz.RWTH-Aachen.DE (8.9.1a/8.9.1/1) with ESMTP id IAA07784; Mon, 10 Dec 2001 08:39:02 +0100 (MET) Received: from ue250-1.rz.RWTH-Aachen.DE (ue250-1.rz.RWTH-Aachen.DE [134.130.3.33]) by nets2.rz.RWTH-Aachen.DE (8.9.1a/8.9.1/1) with ESMTP id TAA28938 for ; Sat, 8 Dec 2001 19:51:07 +0100 (MET) Received: from ue250-1.rz.RWTH-Aachen.DE (relay1.RWTH-Aachen.DE [134.130.3.3]) by ue250-1.rz.RWTH-Aachen.DE (8.12.1/8.11.3-3) with ESMTP id fB8Ip6Qu006427 for ; Sat, 8 Dec 2001 19:51:06 +0100 (MET) Received: from mails.rz.rwth-aachen.de (mails.rz.RWTH-Aachen.DE [134.130.1.251]) by ue250-1.rz.RWTH-Aachen.DE (8.12.1/8.11.3/19) with ESMTP id fB8Ip5vb006424 for ; Sat, 8 Dec 2001 19:51:06 +0100 (MET) Received: from ue250-1.rz.RWTH-Aachen.DE ("port 64833"@ue250-1.rz.RWTH-Aachen.DE [134.130.3.33]) by mails.rz.rwth-aachen.de (Sun Internet Mail Server sims.4.0.2000.10.12.16.25.p8) with ESMTP id <0GO1004MYGD4S3@mails.rz.rwth-aachen.de> for finite-model-theory@lists.RWTH-Aachen.DE (ORCPT rfc822;finite-model-theory@informatik.rwth-aachen.de); Sat, 8 Dec 2001 19:51:05 +0100 (MET) Received: from ue250-1.rz.RWTH-Aachen.DE (relay1.RWTH-Aachen.DE [134.130.3.3]) by ue250-1.rz.RWTH-Aachen.DE (8.12.1/8.11.3-3) with ESMTP id fB8IoxQu006415 for ; Sat, 08 Dec 2001 19:50:59 +0100 (MET) Received: from calliope1.fm.intel.com (fmfdns01.fm.intel.com [132.233.247.10]) by ue250-1.rz.RWTH-Aachen.DE (8.12.1/8.11.3/19) with ESMTP id fB8Iovvb006409 for ; Sat, 08 Dec 2001 19:50:58 +0100 (MET) Received: from fmsmsxvs043.fm.intel.com (fmsmsxvs043.fm.intel.com [132.233.42.129]) by calliope1.fm.intel.com (8.9.1a+p1/8.9.1/d: relay.m4,v 1.46 2001/10/25 21:02:55 root Exp $) with SMTP id SAA02063 for ; Sat, 08 Dec 2001 18:50:55 +0000 (GMT) Received: from FMSMSX017.fm.intel.com ([132.233.42.196]) by fmsmsxvs043.fm.intel.com (NAVGW 2.5.1.16) with SMTP id M2001120810495819961 ; Sat, 08 Dec 2001 10:49:58 -0800 Received: by fmsmsx017.fm.intel.com with Internet Mail Service (5.5.2653.19) id ; Sat, 08 Dec 2001 10:50:46 -0800 From: "Andersen, Flemming L" To: "'isabelle-users@cl.cam.ac.uk'" , "'acl2@cs.utexas.edu'" , "'nuprl@cs.cornell.edu'" , "'Coq-Club@pauillac.inria.fr'" , "'concurrency@cwi.nl'" , "'cav-all@csa.cs.technion.ac.il'" , "'spin2002-announce@informatik.uni-freiburg.de'" , "'spin_list@research.bell-labs.com'" , "'berez+symp@cs.cmu.edu'" , "'vis-users@colorado.edu'" , "'info-hol@jaguar.cs.byu.edu'" , "'pvs@csl.sri.com'" , "'fsdm@it.uq.edu.au'" , "'action-semantics@brics.dk'" , "'agents2000list@iiia.csic.es'" , "'AG-list@uni-mb.si'" , "'alp-diffusion@univ-lille1.fr'" , "'amast@cs.utwente.nl'" , "'bra-types@cs.chalmers.se'" , "'calculemus-ig@dist.unige.it'" , "'cofi-list@brics.dk'" , "'comp.compilers@uni-mb.si'" , "'deduktion@intellektik.informatik.th-darmstadt.de'" , "'eacsl@dimi.uniud.it'" , "'eapls@mailbase.ac.uk'" , "'eatcs-it@cs.unibo.it'" , "'formal-methods@cs.uidaho.edu'" , "'fsdm@it.uq.edu.au'" , "'ftp@logic.at'" , "'sdlnews@sdl-forum.org'" , "'KUVS-L@listserv.uni-heidelberg.de'" , "'prog-lang@diku.dk'" , "'info+fm@larc.nasa.gov'" , "'procos@jiscmail.ac.uk'" , "'finite-model-theory@informatik.rwth-aachen.de'" , "'lics@research.bell-labs.com'" Cc: "Andersen, Flemming L" , "Schubert, Tom" Message-id: <99A1A170DF99D211AC4100A0C95D77E803CF1449@fmsmsx77.fm.intel.com> MIME-version: 1.0 X-Mailer: Internet Mail Service (5.5.2653.19) Content-type: text/plain; charset="iso-8859-1" Subject: [finite-model-theory] Job Opportunities in Formal Verification at Intel Sender: finite-model-theory-admin@Lists.RWTH-Aachen.DE Errors-To: finite-model-theory-admin@Lists.RWTH-Aachen.DE X-BeenThere: finite-model-theory@lists.RWTH-Aachen.DE X-Mailman-Version: 2.0.5 Precedence: bulk List-Help: List-Post: List-Subscribe: , List-Id: List-Unsubscribe: , List-Archive: Date: Sat, 08 Dec 2001 10:50:43 -0800 !!! Please circulate/distribute/post it !!! !!! We apologize if you receive this message more than once. !!! Job Opportunities in Formal Verification at Intel -------------------------------------------------------------- The Intel CPU Design Centers in Austin, Texas and Portland, Oregon have several openings in their Formal Verification groups. We are looking for outstanding candidates with knowledge of formal methods and microprocessor architecture and design. Intel has developed a strong formal verification tradition with a large, experienced FV team that has applied FV methods on several previous projects, most notably the Pentium 4 in Oregon. The Texas Development Center is a new design center with the challenging goal to develop future Intel microprocessors using the latest tools and methods. The essence of the job is simple -increasing confidence in the CPU design using formal verification. The work involves defining a comprehensive test plan for FV, writing it in a formal language, and proving the properties using our model checkers and theorem proving tools. The job involves very close interaction with the design team, with other validation teams, and with Intel's internal R&D groups that improve and develop FV tools. Intel already has a very strong selection of FV tools, but, to ensure continued competitive results, it is an ongoing process to refine and enhance methodologies and tools. A part of the FV work is to contribute to this cross-site effort. Presently Intel is looking for several extraordinary FV candidates to participate in the exciting challenge of ensuring the coming generations microprocessors are correct. The ideal candidate will have a combined knowledge of formal methods (preferably model checking and/or STE techniques as well as theorem proving), tools development, and a good understanding of and knowledge about hardware design and micro architecture. Interested candidates should send their CV, (preferably in both plain ASCII text and Postscript), to either/both: Flemming.L.Andersen@intel.com Tom.Schubert@intel.com FV Manager, Texas Development Center FV Manager, DPG Oregon (512) 314-0394 (503) 712-3522 PS. If you call from abroad: Austin, Texas time zone is Greenwich standard time -6 hours Portland, Oregon time zone is Greenwich standard time -8 hours _______________________________________________ finite-model-theory mailing list finite-model-theory@lists.RWTH-Aachen.DE http://MailMan.RWTH-Aachen.DE/mailman/listinfo/finite-model-theory