EE 345/ES 357/ES 557: Microelectronic Circuit Fabrication

Spring 2004

 

Catalog Data: EE 345/ES 357/ES 557 Microelectronic Circuit Fabrication.

Introduction to the fabrication of microelectronic circuits.  Topics include: materials preparation, oxidation, diffusion, ion implantation, chemical vapor deposition, photolithography and metallization.  Also discussed is the influence of processing steps on electrical characteristics. 

 

Prerequisites: ES 260 and CM 371 (?).  At least junior standing.

 

Textbook:       Stephen A. Campbell, The Science and Engineering of Microelectronic

Fabrication, 2nd ed. (New York, Oxford University Press, 2001).

You should also investigate:

http://public.itrs.net/Files/2003ITRS/Home2003.htm

The International Technology Roadmap for Semiconductors (ITRS), which is published by the (SIA) Semiconductor Industry Association (www.semichips.org), a consortium of semiconductor companies.  The ITRS provides research and development guidelines for people working in both industry and academia to ensure that future technological challenges can be met. 

The 2004 update to the ITRS is available at:

http://www.itrs.net/Common/2004Update/2004Update.htm

 

Class Time:    TTh 11:00-12:15, Science Center 346.

 

Instructor:      Ian Suni (CAMP 236, x4471, isuni@clarkson.edu)

 

Office hours:   M-W, 3:20-5:00

 

Course site:    www.clarkson.edu/~isuni/course357.htm

 

Topical Outline:

 

            Semiconductor substrates:                     Chapter 2

            Diffusion:                                              Chapter 3

            Thermal oxidation:                                Chapter 4

            Ion implantation:                                   Chapter 5

            Rapid thermal processing:                     Chapter 6

            Vacuum science and plasmas:   Chapter 10

            Physical vapor deposition:                     Chapter 12

            Chemical vapor deposition:                   Chapter 13

            Epitaxy:                                                Chapter 14

            Device isolation and interconnects:        Chapter 15

            CMOS Technologies:                           Chapter 16

 

 

 

Learning Objectives:

 

1.                  Students will learn about nonsteady-state diffusion into a solid surface. 

2.                  Students will learn the Deal-Grove model for silicon oxidation and its limitations for ultrathin oxides.

3.                  Students will learn about the effects of the oxide characteristics and morphology on the performance of CMOS devices.

4.                  Students will learn about ion implantation for silicon substrate doping.

5.                  Students will learn the types of pump needed to obtain specific chamber pressures.

6.                  Students will learn the advantages of plasma processing.

7.                  Students will learn the fundamentals of physical vapor deposition (PVD). 

8.                  Students will learn the fundamentals of chemical vapor deposition (CVD). 

9.                  Students will learn about epitaxial growth of silicon.

10.              Students will learn different techniques for device integration, including device isolation, contacts, and metallization.

11.              Students will learn how interconnect size, morphology and design affect the performance of CMOS devices.

 

Learning Outcomes:

 

1.         Students will qualitatively understand which processing steps may be required for depositing or removing Si, SiO2, Cu, Al, W, Si3N4 and other materials employed in fabricating semiconductor devices.

2.         Students will be able to determine junction depths following diffusion.

3.         Students will be able to determine oxide thickness following oxidation.

4.         Students will be able to determine the range and standard deviation of ion implantation profiles.

5.         Students will be able to determine thickness distribution following evaporation and sputtering.

6.         Students will be able to determine growth kinetics for chemical vapor deposition (CVD) under rate limitation by both mass transfer and surface reaction.

7.                  Students will be able to determine the spacing needed between adjacent devices.

 

Evaluation Methods:

 

Distributed as below, with grades distributed based on z-scores, which measures the number of standard deviations students perform above or below the means:

 

                        Midterm examination    25%

                        Final examination          25%

                        Research paper            25%

                        Research paper            25%

 

Exam Policy:  Open book and notes, no make-up exams.

 

Homework:

 

            Assigned but not collected.

 

Chapter 3                     2, 7, 8, 10

Chapter 4                     3, 6, 8, 13

Chapter 5                     1, 4, 6, 7

Chapter 6                     1, 2, 5, 7

Chapter 10                   2, 5, 6, 12

Chapter 12                   1, 2, 4

Chapter 13                   3, 5, 6

Chapter 14                   3, 6, 11, 15

Chapter 15                   1, 2, 8