EE 316 Computer Engineering Junior Lab

EE 316 Computer Engineering Junior Lab

Spring 2009

Catalog Description: A design laboratory in computer engineering emphasizing the fundamentals of designing and testing computer system components. Sub-system level digital circuits are designed, constructed, and tested using standard small- and medium-scale integrated circuits and programmable logic devices. Software components which interface with hardware and operating systems are also designed, written and tested. All design projects employ a team based approach.

Prerequisites: 1. Experience with electronics and laboratory instrumentation (EE 211).

2. Programming ability in C/C++ in a MS-Windows environment (EE 363).

3. Digital logic design (EE 365).

Text: None.

References: Texas Instruments TTL Data Book (book available in lab or go to www.ti.com ),

Motorola FAST and LS TTL Data Book (book available in lab or go to www.mot.com),

National Semiconductor Corp. ( www.national.com ),

Lattice Data Book (book available in lab or go to www.latticesemi.com ),

Altera Corporation (www.altera.com)

Xilinx Corporation (www.xilinx.com)

Digital Design by John Wakerly.

Digital Fundamentals with VHDL by Floyd (Textbook for EE214 and EE365)

Topics:

1. The design process.

2. Use of digital scopes and logic analyzers.

3. Sequential circuit design using standard 7400 series counters, registers, and logic.

4. PC interfacing – serial and parallel ports

4. Programmable logic devices: GAL family devices

5. Use of ROMs in digital circuit design

6. Complex PLDs and VHDL

Course Objectives:

1. Students should learn how to design small digital systems and subsystems given a performance specification.

2. Students should learn how to design digital systems requiring integrated hardware and software designs.

3. Students should learn how to use engineering tools to design, build, test and document digital systems, and how to demonstrate that a system meets the required specifications.

4. Students should learn how to document completed designs in written form using an appropriate technical style.

5. Students should learn teamwork skills, including delegation and assumption of responsibility for individual components in the team’s design effort.

Learning Outcomes:

1. Students will design devices to meet a specification that requires a sequential digital circuit using 7400 series logic. A typical problem will require design methods based on both MSI level components and classical state machine design with SSI components. User interface with buttons, LEDs, and 7 segment displays will also be required.

2. Students will design devices to meet a specification that requires the use of programmable logic devices and read-only-memories.

3. Students will design systems that interface hardware devices with a personal computer.. Typical problems will require design of both hardware and software components and demonstration of overall system performance.

4. Students will demonstrate the use of digital scopes and logic analyzers in verifying system performance of their designs.

5. Students will prepare written reports using good technical writing style that documents their design and test results. Reports will include appropriate diagrams, schematics, etc. prepared using CAD tools.

6. Students will work in teams assigned by the instructor and will document each individual’s contribution to the overall effort.

Assessment Methods:

1. Each team project design will be assessed based on a laboratory demonstration.

2. Each team will have an individual assigned to prepare a written report that documents the design and results.

3. Each student’s design notebook will be reviewed to determine his or her individual contribution to the overall project.

Course Policies and Organization:

The course is organized as a one hour lecture each week and a four hour lab period each week. You are expected to attend all lecture and lab periods. Lab periods will meet in CAMP 195, the ECE undergraduate laboratory. If you complete your design early, you must be in lab at the beginning of the lab period to demonstrate your project to the instructor, to answer questions about your design, and to allow the instructor to inspect your design notebook. You may use the lab at times other than your scheduled lab period if you need additional time to work on your design; it is expected that each project will require some time outside normal scheduled lab time. The grading will begin at 2:30 pm on the due date. The order may be determined by lottery. The lab is generally open each weekday; specific hours will be posted early in the semester.

There will be six projects to design, build, test, and demonstrate. For each project, you will generally be working in a team with two other persons. The teams will be assigned by the instructor and changed for each project. Grades will be given on an individual basis for each project based on the lab demonstration, the contents of your notebook, a task list prepared by the team showing each person’s contributions, and the instructor’s observation of your contribution to a successful team. Consistent effort and achievement on your part in each team effort will be observed and rewarded. Similarly, consistent lack of contribution to the team effort on your part will be penalized. For each project, one team member will be assigned the responsibility of writing the report. The report grade will be an individual grade given to the writer. Each student will write two reports during the semester. The report writer should participate equally in the design, build and test aspects. It is the responsibility of the report writer to have complete and accurate documentation of the design as needed for the report, even though another team member may have done a part of the design. Each team member has the responsibility of providing the report writer with complete and proper documentation of his or her part of the design effort. Failure to do this will be assumed to mean that you did not contribute to the design and will lower your score on the project. The report should also accompany a single page power-point presentation that is suitable for creating a poster. The best poster for each lab may be used in the lab during the Open-house.

The purpose of the lecture is to explain each new project, discuss the various design tools you will need to learn to use, and to answer questions. It is your responsibility to ask questions about those areas you do not understand. You are expected to utilize sources outside class such as the electronics data books in the lab (ask at the window where you check out equipment), online documentation (for design tools), your own textbooks from prior classes, the library, and internet sources. It is very important that you give proper citation (reference) to all sources of data that you use in completing your design project.

Course Grading:

Each project will be graded on a 50 point scale for the project design as demonstrated in lab and a 50 point scale for the written report, and 25 points for the power-point poster. Thus each student is graded on the basis of 450 points maximum. However, some projects may have options that permit you to earn more than 50 points. The primary purpose of options is to give each student the opportunity to make up for poorer performance on another project.

It is your responsibility to document your contribution to the overall effort. Your notebook should have a record of your work in design, implementation, and testing of the final product. Your notebook should be up-to-date and should reflect your efforts toward the final design. The instructor may ask questions of you at the time you demonstrate a completed project; your knowledge and ability to answer these questions will be considered in determining your contribution to the effort. At the time of the lab demonstration, each team must provide a task list showing individual contributions by each team member. The project grade will be determined based on overall project performance. Each student’s grade will be a percentage (from 0 to 100%) of that grade based on the instructor’s assessment of the student’s contribution to the project.

Instructor:

Dr. Abul Khondker

Office: 134 CAMP

Phone: x-2127

E-mail: khondker@clarkson.edu

Office Hours: Monday-Thursday 10:30 - 12:00

Useful files:

Chips available in the ECE lab (partial list - pdf file)

On Parallel Ports

DB9_Ribbon_Cable_Header (pdf file)

LCD_Display (pdf file)

ADC0820 Analog to Digital Converter (ADC) chip (pdf file)